1. Field of the Invention
The present invention relates generally to methods of writing to non-volatile semiconductor memory devices and particularly to those effective when they are applied to products that adopt multi-value storage in NOR, NAND, AND and other similar flash memories.
2. Description of the Background Art
Flash memory has several thousands to several tens of thousands of memory cells referred to as sectors or pages concurrently subjected to a write or a read. A write operation utilizes that electrons introduced into a floating gate increase a memory cell in threshold voltage VTH, and whether threshold voltage VTH as desired is reached is confirmed by a read operation referred to as verification and if it is not attained, further electrons are repeatedly introduced and the verification is repeated. In the verification (or read) operation a decision is made from whether a constant current flows through the memory cell. If the current no longer flows, a decision is made that threshold voltage VTH as desired has been reached.
However, this series of operations is performed for several thousands to several tens of thousands of memory cells concurrently. As such, when, as observed for example in an earlier stage of a write process, a majority of memory cells still has a write insufficiently done, i.e., a current still flows, there is a possibility that a ground line (a source line) serving as a common current path floats in potential, a write voltage VGS applied between the gate and source of a MOS transistor configuring the memory cell is effectively reduced, and a decision is erroneously made that a cell in fact in an on state is in an off state. As a result, this memory cell, with its threshold voltage VTH still low, is assumed to have the write completed.
In contrast, when, as observed in a later stage of the write process, a majority of memory has a write completed, i.e., the current no longer flows through the memory cells, the ground line no longer floats in potential and a correct write voltage VGS is applied to a cell. As such, whether a cell is in the on or off state is accurately determined. Thus the write will be done up to a correct threshold voltage VTH.
As such, the level of a write to a memory cell depends on whether it completes in an earlier stage of the write process or continues to a later stage thereof. As a result, threshold voltage VTH as written will have a range, which disadvantageously prevents threshold voltage VTH from having a narrow distribution required for multi-value storage in particular.
Accordingly, Japanese Patent Laying-Open No. 2000-123581 proposes a method in which after a write to all memory cells ends, data-latching, verification and a write operation are again performed and if there is any cell low in threshold voltage it is again subjected to a write.
In a conventional method, however, data-latching, verification and the write operation are simply repeated twice, which is insufficient to provide threshold voltage VTH having a narrow distribution.